W949D6CB / W949D2CB
512Mb Mobile LPDDR
6.7.2 Status Register Read Timing Diagram
CK
t RP
t SRR
t SRC
CK
Command
CMD
NOP
MRS
NOP
READ
NOP
NOP
NOP
CMD
BA1,BA0
An~A0
01
0
CL=3
DQS
DQ
PCHA, or PCH
DQ:Reg out
= Don’t Care
Notes :
1.SRR can only be issued after power-up sequence is complete.
2.SRR can only be issued with all banks precharged.
3.SRR CL is unchanged from value in the mode register.
4.SRR BL is fixed at 2.
5.tSRR = 2 (min).
6.tSRC = CL + 1; (min time between read to next valid command)
7.No commands other than NOP and DES are allowed between the SRR and the READ.
Publication Release Date: Sep, 21, 2011
- 18 -
Revision A01-007
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